The status reporting system stores all information on the present operating state of the instrument, and on errors which have occurred. This information is stored in the status registers and in the error queue. Both can be queried via GPIB bus (STATus... commands).
As shown in the graphical overview, the status information is of hierarchical structure.
The STB receives its information from the following registers:
The Event Status Register (ESR) with the associated mask register standard event status enable (ESE).
The STATus:OPERation and STATus:QUEStionable registers which are defined by SCPI and contain detailed information on the instrument.
All status registers have the same internal structure.
The service request enable
register SRE can be used as ENABle part of the STB if the STB is structured
according to SCPI. By analogy, the ESE can be used as the ENABle part
of the ESR.
The status registers of the network analyzer are implemented as shown below. Click on the different register parts to obtain more information.
Each standard SCPI register consists of 5 parts which each have a width of 16 bits and have different functions. The individual bits are independent of each other, i.e. each hardware status is assigned a bit number which is valid for all five parts. Bit 15 (the most significant bit) is set to zero for all parts. Thus the contents of the register parts can be processed by the controller as positive integer.
Description
of the five status register parts
The five parts of an SCPI register have different properties and function:
The CONDition part is permanently overwritten by the hardware or the sum bit of the next lower register. Its contents always reflect the current instrument state.
This register part can only be read, but not overwritten or cleared. Reading the CONDition register is nondestructive.
The two transition register parts define which state transition of the condition part (none, 0 to 1, 1 to 0 or both) is stored in the EVENt part.
The Positive TRansition part acts as a transition filter. When a bit of the CONDition part is changed from 0 to 1, the associated PTR bit decides whether the EVENt bit is set to 1:
PTR bit =1: the EVENt bit is set.
PTR bit =0: the EVENt bit is not set.
This status register part can be overwritten and read at will. Reading the PTRansition register is nondestructive.
The Negative TRansition part also acts as a transition filter. When a bit of the CONDition part is changed from 1 to 0, the associated NTR bit decides whether the EVENt bit is set to 1.
NTR bit =1: the EVENt bit is set.
NTR bit =0: the EVENt bit is not set.
This part can be overwritten and read at will. Reading the PTRansition register is nondestructive.
The EVENt part indicates whether an event has occurred since the last reading, it is the "memory" of the condition part. It only indicates events passed on by the transition filters. It is permanently updated by the instrument. This part can only be read by the user. Reading the register clears it. This part is often equated with the entire register.
The ENABle part determines whether the associated EVENt bit contributes to the sum bit (cf. below). Each bit of the EVENt part is ANDed with the associated ENABle bit (symbol '&'). The results of all logical operations of this part are passed on to the sum bit via an OR function (symbol '+').
ENAB bit =0: The associated EVENt bit does not contribute to the sum bit.
ENAB bit =1: If the associated EVENT bit is "1", the sum bit is set to "1" as well.
This part can be overwritten and read by the user at will. Its contents are not affected by reading.
As shown in the graphical overview, the status information is of hierarchical structure.
The STB receives its information from the following registers:
The standard IEEE 488.2 Event Status Register (ESR) with the associated mask register standard event status enable (ESE).
The STATus:OPERation and STATus:QUEStionable registers which are defined by SCPI and contain detailed information on the instrument.
The sum bit is obtained from the EVENt and ENABle part for each register. The result is then entered into a bit of the CONDition part of the higher-order register.
The instrument automatically generates the sum bit for each register. Thus an event can lead to a service request throughout all levels of the hierarchy.
